Field of the Invention
The present invention relates to a method of manufacturing a junction field effect transistor, a method of manufacturing a semiconductor apparatus, a junction field effect transistor, and an imaging apparatus using the junction field effect transistor.
Description of the Related Art
As a junction field effect transistor (JFET), a JFET having a channel region disposed to be parallel with a surface of a semiconductor substrate, and a JFET having a channel region disposed to be perpendicular to a surface of a semiconductor substrate are proposed.
In Japanese Patent Application Laid-Open No. 2006-049508, a JFET has a configuration in which an N-type source region, an N-type channel region, and an N-type drain region are formed at a position at which the regions are superposed in plan view in this order from a surface of a semiconductor substrate in a depth direction.